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skyper 32 r ul ? by semikron rev. 0 ? 11.08.2010 1 skyper ? driver core igbt driver core skyper 32 r ul preliminary data features ? ul recognized according ul 508c ? ul report reference e242581 ? two output channels ? integrated potential free power supply ? under voltage protection ? drive interlock top / bottom ? dynamic short cirucit protection ? shut down input ? failure management ? iec 60068-1 (climate) 40/085/56, no condensation and no dripping water permitted, non-corrosive, climate class 3k3 acc. en60721 typical applications* ? driver for igbt modules in bridge circuits in industrial application ? dc bus voltage up to 1200v footnotes v ce: with external high voltage diode v isolio/ v isol12 : isolation test is not performed as a series test at semikron and must be performed by the user v isolpd : according to vde 0110-20 q out/pulse can be expanded to 6,3q with boost capacitors isolation coordination in compliance with en50178 pd2 operating temperature is real ambient temperature around the driver core degree of protection: ip00 this is an electrostatic discharge sensitive device (esds), international standard iec 60747-1, chapter ix * the specifications of our components may not be c onsidered as an assurance of component characteristics. components have to be tested for t he respective application. adjustments may be necessary. the use of semikron products in l ife support appliances and systems is subject to prior specification and written approval by semikron. we therefore strongly recommend prior consultation of our personal. absolute maximum ratings symbol conditions values unit v s supply voltage primary 16 v v ih input signal voltage (high) vs + 0.3 v v il input signal voltage (low) gnd - 0.3 v iout peak output peak current 15 a iout avmax output average current 50 ma f max max. switching frequency 50 khz v ce collector emitter voltage sense across the igbt 1700 v dv/dt rate of rise and fall of voltage secondary to primary side 50 kv/s v isol io isolation test voltage input - output (ac, rms, 2s) 4000 v v isolpd partial discharge extinction voltage, rms, q pd ! 10pc 1500 v v isol12 isolation test voltage output 1 - output 2 (ac, rms, 2s) 1500 v r gon min minimum rating for external r gon 1.5 " r goff min minimum rating for external r goff 1.5 " q out/pulse max. rating for output charge per pulse 2.5 c t op operating temperature -40 ... 85 c t stg storage temperature -40 ... 85 c characteristics symbol conditions min. typ. max. unit v s supply voltage primary side 14.4 15 15.6 v i so supply current primary (no load) 80 ma supply current primary side (max.) 450 ma v i input signal voltage on / off 15 / 0 v v it+ input treshold voltage high 12.3 v v it- input threshold voltage (low) 4.6 v r in input resistance (switching/halt signal) 10 k " v g(on) turn on output voltage 15 v v g(off) turn off output voltage -7 v f asic asic system switching frequency 8 mhz t d(on)io input-output turn-on propagation time 1.1 s t d(off)io input-output turn-off propagation time 1.1 s t d(err) error input-output propagation time 5.4 7.9 s t perrreset error reset time 9 s t td top-bot interlock dead time 3 4.3 s c ps coupling capacitance prim sec 12 pf w 28 g mtbf mean time between failure ta = 40c 2.5 10 6 h
skyper ? 32 r ul 1 rev 0 ? 11.08.2010 ? by semikron technical explanations revision 00 status: prepared by: johannes krapp this technical explanation is valid for the followi ng parts: related documents: part number: l6100104 title: data sheet skyper 32 r ul date code (yyww): 1030 skyper ? 32 r ul content application and handling instructions .............. ................................................... ................................................... 2 further application support ........................ ................................................... ................................................... ....... 2 general description ................................ ................................................... ................................................... .......... 2 features of skyper 32 r ul......................... ................................................... ................................................... . 2 ul specified remarks ............................... ................................................... ................................................... ......... 3 block diagram ...................................... ................................................... ................................................... ............. 3 dimensions ......................................... ................................................... ................................................... .............. 3 pin array ? primary side........................... ................................................... ................................................... ....... 4 pin array ? secondary side......................... ................................................... ................................................... .... 5 driver performance................................. ................................................... ................................................... .......... 6 insulation......................................... ................................................... ................................................... .................. 6 isolation test voltage ............................. ................................................... ................................................... .......... 7 auxiliary power supply ............................. ................................................... ................................................... ........ 7 under voltage protection of driver power supply (uv p) ................................................. ....................................... 8 input signals ...................................... ................................................... ................................................... ............... 8 short pulse suppression (sps) ...................... ................................................... ................................................... . 8 failure management................................. ................................................... ................................................... ........ 9 shut down input (sdi).............................. ................................................... ................................................... ........ 9 dead time generation (interlock top / bot) (dt).... ................................................... ....................................... 10 dynamic short circuit protection by v cesat monitoring / de-saturation monitoring (dscp)...... ............................ 10 adjustment of dscp................................. ................................................... ................................................... ...... 11 high voltage diode for dscp........................ ................................................... ................................................... . 12 gate resistors ..................................... ................................................... ................................................... ............ 12 external boost capacitors (bc)..................... ................................................... ................................................... . 13 application example ................................ ................................................... ................................................... ....... 13 mounting notes..................................... ................................................... ................................................... .......... 14 environmental conditions........................... ................................................... ................................................... .... 14 marking ............................................ ................................................... ................................................... ............... 15
skyper ? 32 r ul 2 rev 0 ? 11.08.2010 ? by semikron skyper 32 application and handling instructions please provide for static discharge protection duri ng handling. as long as the hybrid driver is not com pletely assembled, the input terminals have to be short-circuited. per sons working with devices have to wear a grounded b racelet. any synthetic floor coverings must not be statically ch argeable. even during transportation the input termi nals have to be short-circuited using, for example, conductive rubb er. worktables have to be grounded. the same safety requirements apply to mosfet- and igbt-modules. any parasitic inductances within the dc-link have t o be minimised. over-voltages may be absorbed by c- or rcd- snubbers between main terminals for plus and minus of the power module. when first operating a newly developed circuit, semi kron recommends to apply low collector voltage and l oad current in the beginning and to increase these values gradu ally, observing the turn-off behaviour of the free- wheeling diode and the turn-off voltage spikes generated across the ig bt. an oscillographic control will be necessary. addit ionally, the case temperature of the module has to be monitored. when the circuit works correctly under rated operation conditions, short-circuit testing may be done, starting again w ith low collector voltage. it is important to feed any errors back to the con trol circuit and to switch off the device immediate ly in failure events. repeated turn-on of the igbt into a short circuit wi th a high frequency may destroy the device. the inputs of the hybrid driver are sensitive to o ver-voltage. voltages higher than v s +0,3v or below -0,3v may destroy these inputs. therefore, control signal over-voltag es exceeding the above values have to be avoided. the connecting leads between hybrid driver and the power module should be as short as possible (max. 20cm), the driver leads should be twisted. further application support latest information is available at http://www.semikron.com . for design support please read the semikron applicati on manual power modules available at http://www.semikron.com . general description the skyper 32 core constitutes an interface between ig bt modules and the controller. the driver is develop ed according to the requirements of ul standard. this core is a half bridge driver. basic functions for driving, pot ential separation and protection are integrated in the driver. thus it ca n be used to build up a driver solution for igbt mod ules. features of skyper 32 r ul two output channels integrated potential free power supply for the sec ondary side short pulse suppression (sps) under voltage protection (uvp) drive interlock (dead time) top / bottom (dt) dynamic short circuit protection (dscp) by v ce monitoring and direct switch off shut down input (sdi) failure management expandable by external boost capacitors (bc) dc bus voltage up to 1200v please note: unless otherwise specified, all values in this tech nical explanation are typical values. typical value s are the average values expected in large quantities and are provided for information p urposes only. these values can and do vary in diffe rent applications. all operating parameters should be validated by user?s technical experts for each application.
skyper ? 32 r ul 3 rev 0 ? 11.08.2010 ? by semikron ul specified remarks the equipment shall be installed in compliance wit h the mounting and spacing requirements of the end- use application. skyper 32 shall be supplied by an isolated limited vol tage / limited current source or a class 2 source. the 15 a peak rating is an instantaneous peak rating only. these devices do not incorporate solid-state motor overload protection. the need for overload protect ion and over- current protection devices shall be determined in t he end-use product. these devices have not been evaluated to over-volt age, over-current, and over-temperature control, an d may need to be subjected to the applicable end-product tests. temperature and tests shall be considered in the e nd use. due to the limited current source, only th e effect of heat generating components in this device on adjacent co mponents in the end product needs to be considered. connectors have not been evaluated field wiring; a ll connections are to be factory wired only. block diagram block diagram dimensions dimensions in mm (bottom view) (top view) 0,2mm unless otherwise noted 10,3 10,3
skyper ? 32 r ul 4 rev 0 ? 11.08.2010 ? by semikron pin array ? primary side connectors connector x10 (rm2,54, 10pin) 0,25mm unless otherwise noted pin signal function specification x10:01 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:02 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:03 prim_nerror_out error output low = no error; open collector output; max. 30v / 15ma (external pull up resistor necessary) x10:04 prim_nerror_in error input 5v logic; low act ive x10:05 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:06 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:07 prim_top_in switching signal input (top swit ch) digital 15 v; 10 kohm impedance; low = top switch off; high = top switch on x10:08 prim_bot_in switching signal input (bottom s witch) digital 15 v; 10 kohm impedance; low = bot switch off; high = bot switch on x10:09 prim_pwr_15p drive core power supply stabili sed +15v 4% x10:10 prim_pwr_15p drive core power supply stabili sed +15v 4%
skyper ? 32 r ul 5 rev 0 ? 11.08.2010 ? by semikron pin array ? secondary side connectors connector x100 / x200 (rm2,54, 10pin) 0,25mm unless otherwise noted pin signal function specification x100:01 sec_top_vce_cfg input reference voltage adj ustment x100:02 sec_top_vce_in input v ce monitoring x100:03 sec_top_15p output power supply for external buffer capacitors stabilised +15v x100:04 sec_top_15p output power supply for external buffer capacitors stabilised +15v x100:05 sec_top_gnd gnd for power supply and gnd for digital signals x100:06 sec_top_igbt_on switch on signal top igbt x100:07 sec_top_gnd gnd for power supply and gnd for digital signals x100:08 sec_top_igbt_off switch off signal top igbt x100:09 sec_top_8n output power supply for external buffer capacitors stabilised -7v x100:10 sec_top_8n output power supply for external buffer capacitors stabilised -7v x200:01 sec_bot_vce_cfg input reference voltage adj ustment x200:02 sec_bot_vce_in input v ce monitoring x200:03 sec_bot_15p output power supply for external buffer capacitors stabilised +15v x200:04 sec_bot_15p output power supply for external buffer capacitors stabilised +15v x200:05 sec_bot_gnd gnd for power supply and gnd for digital signals x200:06 sec_bot_igbt_on switch on signal bot igbt x200:07 sec_bot_gnd gnd for power supply and gnd for digital signals x200:08 sec_bot_igbt_off switch off signal bot igbt x200:09 sec_bot_8n output power supply for external buffer capacitors stabilised -7v x200:10 sec_bot_8n output power supply for external buffer capacitors stabilised -7v
skyper ? 32 r ul 6 rev 0 ? 11.08.2010 ? by semikron driver performance the driver is designed for application with half br idges or single modules and a maximum gate charge p er pulse < 2,5c (< 6,3c with external boost capacitors). t he charge necessary to switch the igbt is mainly dep ending on the igbt?s chip size, the dc-link voltage and the gate v oltage. this correlation is shown in module datashe ets. it should, however, be considered that the driver is turned on at +15v and turned off at -7v. therefore, the gate v oltage will change by 22v during each switching procedure. unfortunately, many datasheets do not show negative gate voltages. in order to determine the required charge, the upper leg of the charge curve may be prolonged to +22v for determina tion of approximate charge per switch. the medium output current of the driver is determin ed by the switching frequency and the gate charge. the maximum switching frequency may be calculated with the show n equation and is limited by the average current of the driver power supply and the power dissipation of driver componen ts. calculation switching frequency maximum switching frequency @ different gate charge s @ t amb =25c f max : maximum switching frequency * iout avmax : maximum output average current q ge : gate charge of the driven igbt * @ t amb =25c 0 khz 10 khz 20 khz 30 khz 40 khz 50 khz 60 khz 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c gate charge switching frequency with external boost capacitors calculation average output current average output current as a function of the ambient temperature ge sw av q f iout = iout av : average output current f sw : switching frequency q ge : gate charge of the driven igbt 0 ma 10 ma 20 ma 30 ma 40 ma 50 ma 60 ma 0 c 10 c 20 c 30 c 40 c 50 c 60 c 70 c 80 c 90 c ambient temperature average output current insulation magnetic transformers are used for insulation betwe en gate driver primary and secondary side. the tran sformer set consists of pulse transformers which are used bidirectional for turn-on and turn-off signals of the igbt and the error feedback between secondary and primary side, and a dc/dc con verter. this converter provides a potential separat ion (galvanic separation) and power supply for the two secondary (top and bot) sides of the driver. thus, external tra nsformers for external power supply are not required. creepage and clearance distance in mm primary to secondary min. 12,2 please note: the maximum value of the switching frequency is lim ited to 50khz due to switching reasons. ge max av max q iout f =
skyper ? 32 r ul 7 rev 0 ? 11.08.2010 ? by semikron isolation test voltage the isolation test voltage represents a measure of immunity to transient voltages. the maximum test vo ltage and time applied once between input and output, and once bet ween output 1 and output 2 are indicated in the abs olute maximum ratings. the high-voltage isolation tests and repea ted tests of an isolation barrier can degrade isola tion capability due to partial discharge. repeated isolation voltage tests should be performed with reduced voltage. the test voltage must be reduced by 20% for each repeated test. the isolation of the isolation barrier (transformer ) is checked in the part. with exception of the iso lation barrier, no active parts, which could break through are used. an isolat ion test is not performed as a series test. therefo re, the user can perform once the isolation test with voltage and ti me indicated in the absolute maximum ratings. auxiliary power supply a few basic rules should be followed when dimensioni ng the customer side power supply for the driver. t he following table shows the required features of an appropriate power supply. requirements of the auxiliary power supply regulated power supply +15v 4% maximum rise time of auxiliary power supply 50ms minimum peak current of auxiliary supply 1a power on reset completed after 150ms the supplying switched mode power supply may not be turned-off for a short time as consequence of its current limitation. its output characteristic needs to be considered. sw itched mode power supplies with fold-back character istic or hiccup-mode can create problems if no sufficient over current m argin is available. the voltage has to rise continu ously and without any plateau formation as shown in the following diagram . rising slope of the power supply voltage if the power supply is able to provide a higher cur rent, a peak current will flow in the first instant to charge up the input capacitances on the driver. its peak current value will be limited by the power supply and the effecti ve impedances (e.g. distribution lines), only. it is recommended to avoid the paralleling of sever al customer side power supply units. their differen t set current limitations may lead to dips in the supply voltage. the driver is ready for operation typically 150ms a fter turning on the supply voltage. the driver erro r signal prim_nerror_out is operational after this time. witho ut any error present, the error signal will be rese t. to assure a high level of system safety the top and bot signal inputs should stay in a defined state (of f state, low) during driver turn-on time. only after the end of t he power-on-reset, igbt switching operation shall be permitted. please note: do not apply switching signals during power on reset. please note: an isolation test is not performed at semikron as a series test.
skyper ? 32 r ul 8 rev 0 ? 11.08.2010 ? by semikron under voltage protection of driver power supply (uvp) the internally detected supply voltage of the drive r has an under voltage protection. the table below gives an overview of the trip level. supply voltage uvp level regulated +15v 4% 13,5v if the internally detected supply voltage of the dr iver falls below this level, the igbts will be switc hed off (igbt driving signals set to low). the input side switching signa ls of the driver will be ignored. the error memory will be set, and the output prim_nerror_out changes to the high state. input signals the signal transfer to each igbt is made with pulse transformers, used for switching on and switching o ff of the igbt. the inputs have a schmitt trigger characteristic and a p ositive / active high logic (input high = igbt on; i nput low = igbt off). it is mandatory to use circuits which switch active to +15v and 0v. pull up and open collector output sta ges must not be used for top / bot control signals. it is recommended choosing the line drivers according to the demande d length of the signal lines. top / bot input a capacitor is connected to the input to obtain hig h noise immunity. this capacitor can cause for current limited line d rivers a little delay of few ns, which can be neglected. the capacitors have to be placed as close as possible to the driver interface. short pulse suppression (sps) this circuit suppresses short turn-on and off-pulse s of incoming signals. this way the igbts are protec ted against spurious noise as they can occur due to bursts on the signal lines. pulses shorter than 625ns are suppressed an d all pulses longer than 750ns get through for 100% probability. pulses with a length in-between 625ns and 750ns can be eit her suppressed or get through. pulse pattern ? sps shortpulses prim_top/bot_in(high) prim_top/bot_in(low) sec_top/bot_igbt_on sec_top/bot_igbt_off please note: it is not permitted to apply switching pulses short er than 1s.
skyper ? 32 r ul 9 rev 0 ? 11.08.2010 ? by semikron failure management any error detected will set the error latch and forc e the output prim_nerror_out into high state. switchin g pulses from the controller will be ignored. connected and switc hed off igbts remain turned off. the switched off i gbts remain turned off. a reset of the latched error memory is only pos sible if no failure is present anymore and if the t op and bot input signals are set to the low level for a period of t perrreset > 9s. the output prim_nerror_out is an open collector outpu t. for the error evaluation an external pull-up-res istor is necessary pulled-up to the positive operation volta ge of the control logic (low signal = no error pres ent, wire break safety is assured). open collector error transistor application hints an external resistor to the controller logic high l evel is required. the resistor has to be in the range of v / i max < r pull_up < 10k . prim_nerror_out can operate to maximum 30v and can switch a maximum of 15ma. example: for v = +15v the needed resistor should be in the range r pull_up = (15v/15ma) ? 10k ? 1k ? 10k . shut down input (sdi) the shut down input / error input signal can gather error signals of other hardware components for swi tching off the igbt (input high = no turn-off; input low = turn-off). a low signal at prim_nerror_in will set the error latc h and force the output prim_nerror_out into high stat e. switching pulses from the controller will be ignored . a reset of the latched error memory is only possib le if no low signal at prim_nerror_in is present anymore and if the top and bo t input signals are set to the low level for a peri od of t perrreset > 9s. the sdi function can be disabled by no connection or connecting to 5v. connection sdi please note: the error output prim_error_out is not short circui t proof.
skyper ? 32 r ul 10 rev 0 ? 11.08.2010 ? by semikron dead time generation (interlock top / bot) (dt) the dt circuit prevents, that top and bot igbt of one half bridge are switched on at the same time (shoo t through). the dead time is not added to a dead time given by the controller. thus the total dead time is the maximum of "built in dead time" and "controller dead time". it is possible to contr ol the driver with one switching signal and its inv erted signal. pulse pattern ? dt the total propagation delay of the driver is the s um of interlock dead time (t td ) and driver input output signal propagation delay (t d(on;off)io ) as shown in the pulse pattern. moreover the switching time of the igbt chip has to be taken into account (not shown in the pulse pattern). in case both channel inputs (prim_top_in and prim_bot_in) are at high level, the igbts will be t urned off. if only one channel is switching, there will be no interlock dead time. dynamic short circuit protection by v cesat monitoring / de-saturation monitoring (dscp) the dscp circuit is responsible for short circuit sen sing. it monitors the collector-emitter voltage v ce of the igbt during its on-state. due to the direct measurement of v cesat on the igbt's collector, the dscp circuit switches of f the igbts and an error is indicated. the reference voltage v ceref may dynamically be adapted to the igbts switching b ehaviour. immediately after turn-on of the igbt, a higher value is effective than in steady sta te. this value will, however, be reset, when the ig bt is turned off. v cestat is the steady-state value of v ceref and is adjusted to the required maximum value for each igbt by an external resistor r ce . it may not exceed 10v. the time constant for the del ay (exponential shape) of v ceref may be controlled by an external capacitor c ce , which is connected in parallel to r ce . it controls the blanking time t bl which passes after turn-on of the igbt before the v cesat monitoring is activated. this makes an adaptation to any igbt switching behaviour possible. reference voltage (v ceref ) characteristic after t bl has passed, the v ce monitoring will be triggered as soon as v ce > v ceref and will turn off the igbt. the error memory will be set, and the output prim_nerror_out ch anges to the high state. possible failure modes are shows in the following pictures. please note: the generated dead time is fixed and cannot be chan ged. please note: no error message will be generated when overlap of switching signals occurs.
skyper ? 32 r ul 11 rev 0 ? 11.08.2010 ? by semikron short circuit during operation turn on of igbt too slow * short circuit during turn on * or adjusted blanking time too short adjustment of dscp the external components r ce and c ce are applied for adjusting the steady-state thresho ld the blanking time. connection r ce and c ce dimensioning of r ce and c ce [ ] ? ? ? ?? ? ? ? ? ?? ? ? + ? ? ? = v 5,8 k v r v 1 ln k 17 k r vce cestat ce [ ] [ ] pf s r k s s s t pf c ce bl ce 00323 ,0 11,0 5,2 ? ? ? = v cestat : collector-emitter threshold static monitoring vol tage t blx : blanking time v cestat_max = 8v (r vce = 0 ) v cestat_max = 7v (r vce = 1k ) please note: the equations are calculated considering the use of high voltage diode by203/20s. the calculated values v cestat and t bl are typical values at room temperature. these values can and do vary in the ap plication (e.g. tolerances of used high voltage diode, resistor r ce , capacitor c ce ). the dscp function is not recommended for over curre nt protection. application hints if the dscp function is not used, for example durin g the experimental phase, sec_top_vce_in must be co nnected with sec_top_gnd for disabling scp @ top side and sec_bo t_vce_in must be connected with sec_bot_gnd for dis abling scp @ bot side.
skyper ? 32 r ul 12 rev 0 ? 11.08.2010 ? by semikron high voltage diode for dscp the high voltage diode blocks the high voltage duri ng igbt off state. the connection of this diode betw een driver and igbt is shown in the following schematic. connection high voltage diode characteristics reverse blocking voltage of the diode shall be hig her than the used igbt. reverse recovery time of the fast diode shall be l ower than v ce rising of the used igbt. forward voltage of the diode: 1,5v @ 2ma forward c urrent (t j =25c). a collector series resistance r vce (1k / 0,4w) must be connected for 1700v igbt operation. gate resistors the output transistors of the driver are mosfets. the sources of the mosfets are separately connected to external terminals in order to provide setting of the turn-o n and turn-off speed of each igbt by the external re sistors r gon and r goff . as an igbt has input capacitance (varying during swit ching time) which must be charged and discharged, b oth resistors will dictate what time must be taken to do this. the fin al value of the resistance is difficult to predict, because it depends on many parameters as dc link voltage, stray inductanc e of the circuit, switching frequency and type of i gbt. connection r gon , r goff application hints the gate resistor influences the switching time, sw itching losses, dv/dt behaviour, etc. and has to be selected very c arefully. due to this influence a general value for the gate resisto rs cannot be recommended. the gate resistor has to be optimized according to switching behaviour and over voltage peaks within t he specific circuitry. by increasing r gon the turn-on speed will decrease. the reverse peak current of the free-wheeling diode will dimini sh. by increasing r goff the turn-off speed of the igbt will decrease. the inductive peak over voltage during turn-off will di minish. in order to ensure locking of the igbt even when th e driver supply voltage is turned off, a resistance (r ge ) has to be integrated. please note: do not connect the terminals sec_top_igbt_on with s ec_top_igbt_off and sec_bot_igbt_on with sec_bot_igbt_off, respectively.
skyper ? 32 r ul 13 rev 0 ? 11.08.2010 ? by semikron external boost capacitors (bc) the rated gate charge of the driver may be increase by additional boost capacitors to drive igbt with l arge gate capacitance. connection external boost capacitors dimensioning of c boost c boost15p [f] = q ge [c] 1/v - 2,2f c boost8n [f] = q ge [c] 2/v - 4,7f q ge : gate charge of the igbt @ v ge = -7 ?+15v minimum rated voltage c boost15p : 25v minimum rated voltage c boost8n : 16v type of capacitor: ceramic capacitor please consider the maximum rating four output char ge per pulse of the gate driver. application hints the external boost capacitors should be connected a s close as possible to the gate driver and to have low inducta nce. application example connection schematic 1nf 100v +15v 1nf 100v input bot input top 1nf 100v 220f 35v error out 1nf 100v 4,75k by203/20s dc+ 10k 16v 4,7f 2,2f 25v by203/20s 10k 4,7f 16v 2,2f 25v dc- load 18k 330pf 50v ron roff 18k 330pf 50v ron roff sec_top_vce_cfg sec_top_vce_in sec_top_15p sec_top_15p sec_top_gnd sec_top_igbt_on sec_top_gnd sec_top_igbt_off sec_bot_vce_cfg sec_bot_vce_in sec_bot_15p sec_bot_15p sec_bot_gnd sec_bot_igbt_on sec_bot_gnd sec_bot_igbt_off prim_pwr_gnd prim_pwr_gnd prim_nerror_out prim_nerror_in prim_pwr_gnd prim_pwr_gnd prim_top_in prim_bot_in prim_pwr_15p prim_pwr_15p skyper tm 32 sec_top_8n sec_top_8n sec_bot_8n sec_bot_8n - application example for 1200v igbt - q out/pulse = 5c - v ceref = 5,5v - t bl = 5,5s
skyper ? 32 r ul 14 rev 0 ? 11.08.2010 ? by semikron mounting notes soldering hints finished hole & pad size in mm the temperature of the solder must not exceed 260c , and solder time must not exceed 10 seconds. the ambient temperature must not exceed the specifi ed maximum storage temperature of the driver. the solder joints should be in accordance to ipc a 610 revision d (or later) - class 3 (acceptability of electronic assemblies) to ensure an optimal connection between driver core and printed circuit board. the connection between driver core and printed circ uit board should be mechanical reinforced by using support posts. use of support posts product information of suitable support posts and distributor contact information is available at e.g . http://www.richco-inc.com (e.g. series dlmspm, lcbst ). environmental conditions the driver core is type tested under the environmen tal conditions below. conditions values (max.) vibration sinusoidal sweep 20hz ? 500hz, 5g, 26 swe eps per axis (x, y, z) - tested acc. iec 68-2-6 - connection between driver core and printed circui t board mechanical reinforced by using support post s. shock half-sinusoidal pulse, 5g, shock width 18ms, 3 shocks in each direction (x, y, z), 18 shocks in total - tested acc. iec 68-2-27 - connection between driver core and printed circui t board mechanical reinforced by using support post s. the characteristics and further environmental condi tions are indicated in the data sheet. please note: the use of agressive materials in cleaning and pott ing process of driver core may be detrimental for t he device parameters. if the driver core is coated by the user, any warranty (gew?hrlei stung) expires. please note: the driver is not suited for hot air reflow or infr ared reflow processes.
skyper ? 32 r ul 15 rev 0 ? 11.08.2010 ? by semikron marking every driver core is marked. the marking contains th e following items. part marking information 1. semikron part number (8 digits) + version number (2 digits) 2. date code (4 digits): yyww 3. continuous number referred to date coce (4 digit s) 4. data matrix code the data matrix code is described as follows: type: eec 200 standard: ico / iec 16022 cell size: 0,254 - 0,3 mm dimension: 5 5 mm the following data is coded: xxxxxxxxyy zzzz vvvv 8 digits 2 digits part number version number 1 digit blank 4 digits date code 1 digit blank 4 digits continuous number disclaimer semikron reserves the right to make changes without f urther notice herein to improve reliability, functi on or design. information furnished in this document is believed to be accurate and reliable. however, no representa tion or warranty is given and no liability is assumed with respect to t he accuracy or use of such information. semikron does not assume any liability arising out of the application or use of any product or circuit described herein. furthe rmore, this technical information may not be considered as an assurance o f component characteristics. no warranty or guarant ee expressed or implied is made regarding delivery, performance or suitability. this document supersedes and replac es all information previously supplied and may be superseded by update s without further notice. semikron products are not authorized for use in life support appliances and systems without the express written approval by semikron. www.semikron.com

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